# Makefile cheatsheet
The one-page guide to Makefile: usage, examples, links, snippets, and more.

## Var assignment

    foo  = "bar"
    bar  = $(foo) foo  # dynamic (renewing) assignment
    foo := "boo"       # one time assignment, $(bar) now is "boo foo"
    foo ?= /usr/local  # safe assignment, $(foo) and $(bar) still the same
    bar += world       # append, "boo foo world"
    foo != echo fooo   # exec shell command and assign to foo
    # $(bar) now is "fooo foo world"

`=` expressions are only evaluated when they’re being used.

## Magic variables

    out.o: src.c src.h
      $@   # "out.o" (target)
      $<   # "src.c" (first prerequisite)
      $^   # "src.c src.h" (all prerequisites)

    %.o: %.c
      $*   # the 'stem' with which an implicit rule matches ("foo" in "foo.c")

    also:
      $+   # prerequisites (all, with duplication)
      $?   # prerequisites (new ones)
      $|   # prerequisites (order-only?)

      $(@D) # target directory

## Command prefixes

Prefix | Description
--- | ---
`-` | Ignore errors
`@` | Don’t print command
`+` | Run even if Make is in ‘don’t execute’ mode

    build:
        @echo "compiling"
        -gcc $< $@

    -include .depend

## Find files

    js_files  := $(wildcard test/*.js)
    all_files := $(shell find images -name "*")

## Substitutions

    file     = $(SOURCE:.cpp=.o)   # foo.cpp => foo.o
    outputs  = $(files:src/%.coffee=lib/%.js)

    outputs  = $(patsubst %.c, %.o, $(wildcard *.c))
    assets   = $(patsubst images/%, assets/%, $(wildcard images/*))

## More functions

    $(strip $(string_var))

    $(filter %.less, $(files))
    $(filter-out %.less, $(files))

## Building files

    %.o: %.c
      ffmpeg -i $< > $@   # Input and output
      foo $^

## Includes

    -include foo.make

## Options

    make
      -e, --environment-overrides
      -B, --always-make
      -s, --silent
      -j, --jobs=N   # parallel processing

## Conditionals

    foo: $(objects)
    ifeq ($(CC),gcc)
      $(CC) -o foo $(objects) $(libs_for_gcc)
    else
      $(CC) -o foo $(objects) $(normal_libs)
    endif

## Recursive

    deploy:
      $(MAKE) deploy2

## Further reading

- isaacs’s Makefile
- Your Makefiles are wrong
- Manual

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