mirror of https://gitee.com/bigwinds/arangodb
Activate crc4, new assembler optimizations.
Only on x86_64 and if not overridden.
This commit is contained in:
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6fda5645c4
commit
efb9004340
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@ -32,8 +32,8 @@
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.globl TRI_BlockCrc32_SSE42
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.globl TRI_BlockCrc32_SSE42
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.globl _TRI_BlockCrc32_SSE42
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.globl _TRI_BlockCrc32_SSE42
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#ifndef __APPLE__
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#ifndef __APPLE__
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// .type TRI_BlockCrc32_SSE42, @function
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.type TRI_BlockCrc32_SSE42, @function
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// .type _TRI_BlockCrc32_SSE42, @function
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.type _TRI_BlockCrc32_SSE42, @function
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#endif
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#endif
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TRI_BlockCrc32_SSE42:
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TRI_BlockCrc32_SSE42:
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_TRI_BlockCrc32_SSE42:
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_TRI_BlockCrc32_SSE42:
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@ -57,7 +57,7 @@ crca4:
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crca9:
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crca9:
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ret
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ret
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#ifndef __APPLE__
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#ifndef __APPLE__
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// .size TRI_BlockCrc32_SSE42, .-TRI_BlockCrc32_SSE42
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.size TRI_BlockCrc32_SSE42, .-TRI_BlockCrc32_SSE42
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// .size _TRI_BlockCrc32_SSE42, .-_TRI_BlockCrc32_SSE42
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.size _TRI_BlockCrc32_SSE42, .-_TRI_BlockCrc32_SSE42
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#endif
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#endif
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/* end of TRI_BlockCrc32_SSE42 */
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/* end of TRI_BlockCrc32_SSE42 */
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@ -1,4 +1,26 @@
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/* TRI_BlockCrc32 assembler */
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/////////////////////////////////////////////////////////////////////////////////
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/// DISCLAIMER
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///
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/// Copyright 2016-2016 ArangoDB GmbH, Cologne, Germany
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///
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/// Licensed under the Apache License, Version 2.0 (the "License");
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/// you may not use this file except in compliance with the License.
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/// You may obtain a copy of the License at
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///
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/// http://www.apache.org/licenses/LICENSE-2.0
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///
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/// Unless required by applicable law or agreed to in writing, software
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/// distributed under the License is distributed on an "AS IS" BASIS,
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/// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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/// See the License for the specific language governing permissions and
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/// limitations under the License.
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///
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/// Copyright holder is ArangoDB GmbH, Cologne, Germany
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///
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/// @author Richard Parker
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////////////////////////////////////////////////////////////////////////////////
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/* TRI_BlockCrc32_SSE42 assembler*/
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/* assumes SSE4.2 flag set */
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/* assumes SSE4.2 flag set */
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/* input */
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/* input */
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@ -22,10 +44,15 @@
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/* laptop for data length median 80, mean 300 bytes */
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/* laptop for data length median 80, mean 300 bytes */
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.text
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.text
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.globl TRI_BlockCrc32
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.globl TRI_BlockCrc32_SSE42
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.type TRI_BlockCrc32, @function
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.globl _TRI_BlockCrc32_SSE42
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#ifndef __APPLE__
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.type TRI_BlockCrc32_SSE42, @function
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.type _TRI_BlockCrc32_SSE42, @function
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#endif
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.align 32 /* primarily to stabilize times */
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.align 32 /* primarily to stabilize times */
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TRI_BlockCrc32: /* entry point */
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TRI_BlockCrc32_SSE42: /* entry point */
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_TRI_BlockCrc32_SSE42:
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cmpq $12,%rdx /* if the string < 12 bytes long */
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cmpq $12,%rdx /* if the string < 12 bytes long */
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/* note #1, #2 threatens segfault otherwise */
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/* note #1, #2 threatens segfault otherwise */
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@ -634,6 +661,9 @@ crct2:
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.4byte 0x05ff89e4, 0x6b7beb64, 0xd8f74ce4, 0xb6732e64
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.4byte 0x05ff89e4, 0x6b7beb64, 0xd8f74ce4, 0xb6732e64
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.4byte 0xba027515, 0xd4861795, 0x670ab015, 0x098ed295
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.4byte 0xba027515, 0xd4861795, 0x670ab015, 0x098ed295
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.size TRI_BlockCrc32, .-TRI_BlockCrc32
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#ifndef __APPLE__
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.size TRI_BlockCrc32_SSE42, .-TRI_BlockCrc32_SSE42
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.size _TRI_BlockCrc32_SSE42, .-_TRI_BlockCrc32_SSE42
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#endif
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/* end of TRI_BlockCrc32_SSE42 */
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/* end of TRI_BlockCrc32 */
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@ -130,7 +130,7 @@ set(LIB_ARANGO_VPACK
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if (ASM_OPTIMIZATIONS AND CMAKE_TARGET_ARCHITECTURE_CODE MATCHES "x86_64")
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if (ASM_OPTIMIZATIONS AND CMAKE_TARGET_ARCHITECTURE_CODE MATCHES "x86_64")
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SET(LIB_ASM_SOURCES
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SET(LIB_ASM_SOURCES
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Basics/crc1.s
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Basics/crc4.s
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)
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)
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add_definitions("-DENABLE_ASM_CRC32=1")
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add_definitions("-DENABLE_ASM_CRC32=1")
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message("-- Will compile in hand-optimized assembler code for CRC32.")
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message("-- Will compile in hand-optimized assembler code for CRC32.")
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