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Activate crc4, new assembler optimizations.

Only on x86_64 and if not overridden.
This commit is contained in:
Max Neunhoeffer 2016-05-10 13:16:02 +02:00
parent 6fda5645c4
commit efb9004340
3 changed files with 41 additions and 11 deletions

View File

@ -32,8 +32,8 @@
.globl TRI_BlockCrc32_SSE42
.globl _TRI_BlockCrc32_SSE42
#ifndef __APPLE__
// .type TRI_BlockCrc32_SSE42, @function
// .type _TRI_BlockCrc32_SSE42, @function
.type TRI_BlockCrc32_SSE42, @function
.type _TRI_BlockCrc32_SSE42, @function
#endif
TRI_BlockCrc32_SSE42:
_TRI_BlockCrc32_SSE42:
@ -57,7 +57,7 @@ crca4:
crca9:
ret
#ifndef __APPLE__
// .size TRI_BlockCrc32_SSE42, .-TRI_BlockCrc32_SSE42
// .size _TRI_BlockCrc32_SSE42, .-_TRI_BlockCrc32_SSE42
.size TRI_BlockCrc32_SSE42, .-TRI_BlockCrc32_SSE42
.size _TRI_BlockCrc32_SSE42, .-_TRI_BlockCrc32_SSE42
#endif
/* end of TRI_BlockCrc32_SSE42 */

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@ -1,4 +1,26 @@
/* TRI_BlockCrc32 assembler */
/////////////////////////////////////////////////////////////////////////////////
/// DISCLAIMER
///
/// Copyright 2016-2016 ArangoDB GmbH, Cologne, Germany
///
/// Licensed under the Apache License, Version 2.0 (the "License");
/// you may not use this file except in compliance with the License.
/// You may obtain a copy of the License at
///
/// http://www.apache.org/licenses/LICENSE-2.0
///
/// Unless required by applicable law or agreed to in writing, software
/// distributed under the License is distributed on an "AS IS" BASIS,
/// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
/// See the License for the specific language governing permissions and
/// limitations under the License.
///
/// Copyright holder is ArangoDB GmbH, Cologne, Germany
///
/// @author Richard Parker
////////////////////////////////////////////////////////////////////////////////
/* TRI_BlockCrc32_SSE42 assembler*/
/* assumes SSE4.2 flag set */
/* input */
@ -22,10 +44,15 @@
/* laptop for data length median 80, mean 300 bytes */
.text
.globl TRI_BlockCrc32
.type TRI_BlockCrc32, @function
.globl TRI_BlockCrc32_SSE42
.globl _TRI_BlockCrc32_SSE42
#ifndef __APPLE__
.type TRI_BlockCrc32_SSE42, @function
.type _TRI_BlockCrc32_SSE42, @function
#endif
.align 32 /* primarily to stabilize times */
TRI_BlockCrc32: /* entry point */
TRI_BlockCrc32_SSE42: /* entry point */
_TRI_BlockCrc32_SSE42:
cmpq $12,%rdx /* if the string < 12 bytes long */
/* note #1, #2 threatens segfault otherwise */
@ -634,6 +661,9 @@ crct2:
.4byte 0x05ff89e4, 0x6b7beb64, 0xd8f74ce4, 0xb6732e64
.4byte 0xba027515, 0xd4861795, 0x670ab015, 0x098ed295
.size TRI_BlockCrc32, .-TRI_BlockCrc32
#ifndef __APPLE__
.size TRI_BlockCrc32_SSE42, .-TRI_BlockCrc32_SSE42
.size _TRI_BlockCrc32_SSE42, .-_TRI_BlockCrc32_SSE42
#endif
/* end of TRI_BlockCrc32_SSE42 */
/* end of TRI_BlockCrc32 */

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@ -130,7 +130,7 @@ set(LIB_ARANGO_VPACK
if (ASM_OPTIMIZATIONS AND CMAKE_TARGET_ARCHITECTURE_CODE MATCHES "x86_64")
SET(LIB_ASM_SOURCES
Basics/crc1.s
Basics/crc4.s
)
add_definitions("-DENABLE_ASM_CRC32=1")
message("-- Will compile in hand-optimized assembler code for CRC32.")